Published in ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA), 2020
This paper proposed a hardware race detector for GPUs. Our hardware was able to efficiently support detection of scoped races in GPU programs. Read more...
Published in ACM SIGOPS 28th Symposium on Operating Systems Principles (SOSP), 2021
This paper proposed an in-GPU software race detector. The race detector made use of NVBit, a binary instrumentation tool. Using this, we were able to detect races due to improper synchronization, scopes, or ITS. We even found races in 3 NVIDIA-supported libaries (cuML, CUB, Cooperative Groups). Read more...
Published in ACM 27th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2022
This paper explored how to utilise commercially available NVM on a GPU using real hardware. Through this process we came up with a benchmark suite (GPMBench) consisting of GPU applications that benefit from both GPU parallelism as well as NVM persistence. We also provide a GPU-optimised library (libGPM) that simplifies access to NVM from a GPU. Read more...
Published in ACM 28th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2023
This paper explores persistency models for GPUs, analyzing whether CPU persistency models are suitable for GPU architecture and the needs of GPU applications (spoiler: they aren’t). We investigate how to express persistency models for intra-thread and inter-thread persist memory order (PMO) for GPU programs. We then look at how to design the hardware architecture necessary to implement these operations efficiently. Read more...
Published in ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA), 2024
In this paper, we explore HammerBlade, which simultaneously achieves scalability, programmability and density. HammerBlade is a fully open-source RISC-V manycore architecture, which has been silicon-validated with a 2048-core ASIC implementation using a 14/16nm process. Read more...
Published in ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA), 2024
In this paper we propose (MC)2, a new lazy memory copy mechanism that provides performance improvement to applications that sparsely access the data that they copy. We show that (MC)2 provides benefits across a variety of microbenchmarks and workloads, including Google’s Protobuf, where (MC)2 provides a 43% speedup and Linux huge page copy-on-write faults, where (MC)2 provides 250x lower latency. Read more...
Presented at 13th Annual Non-volatile Memories Workshop
This is a workshop presentation of ‘GPM’ published in ASPLOS ‘23. This paper explored how to utilise commercially available NVM on a GPU using real hardware. Through this process we came up with a benchmark suite (GPMBench) consisting of GPU applications that benefit from both GPU parallelism as well as NVM persistence. We also provide a GPU-optimised library (libGPM) that simplifies access to NVM from a GPU. Read more...
Presented at ASPLOS 2023, Wild and Crazy Ideas Session
Sujay and I found ourselves chatting about the future of research one day. It was around this time that an explosion of interest in Large Language Models (LLMs) had started, sparked by the release of ChatGPT by OpenAI. Our discussion inevitably veered towards this topic, and we became curious about how LLMs could revolutionize the field of operating systems. Read more...